The present invention relates to a technique for improving precision of conversion of an A/D (Analog/Digital) converter and, more particularly, to a technique effective to reduce a conversion error in a semiconductor integrated circuit device on which a plurality of A/D converters are mounted.
A semiconductor integrated circuit device on which an A/D converter is mounted is widely used. For example, in a semiconductor integrated circuit device used for controlling a car or the like, there is a tendency that the number of sensors coupled to the semiconductor integrated circuit device increases, and it is desired to mount a plurality of A/D converters.
On the other hand, in a semiconductor integrated circuit device of this type, as reduction in cost and the like is desired, decrease in the number of external terminals is required. The inventors of the present invention have examined and found that, to decrease the number of external terminals of a semiconductor integrated circuit device provided with a plurality of A/D converters, a technique of sharing power supply terminals (AVCC, AVSS, REFH, and REFL) for supplying a power supply voltage, a reference voltage, and the like to the A/D converters is valid.
For example, in the case of mounting two A/D converters, when the above-described power supply terminals are not shared, four external terminals are necessary for each of the A/D converters, and total eight external terminals are necessary. Further, in the case of mounting three A/D converters, when the above-described power supply terminals are not shared, 12 external terminals are required.